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美光DDR5技术支持计划助力生态系统

布莱恩·德雷克| 2021年6月

We at 微米 often feel like the advance guard as the tech industry marches ever closer to a major revolution in next-generation computing. To extract value and insights from the massive amounts of data being generated in the world today, 这场革命将需要先进的记忆, 以及额外的计算能力.

Today’s system architects understand that DDR4 SDRAM has hit a wall of 3200 MT/s while CPU core counts continue to increase. So, continued gains in compute performance require a high-performance 内存 to maintain available bandwidth per CPU core. Adding cores with DDR4 actually results in bandwidth per CPU core declining.

桑杰Mehrotra，美光科技首席执行官

这就是我们推出DDR5 TEP的原因, to help get the entire ecosystem ready for DDR5 platform integration and optimization.

JEDEC公布的标准 第五代双数据速率SDRAM (DDR5) in July 2020 to address the need for higher bandwidth and massive improvements over previous generations of SDRAM. DDR5是迄今为止技术最先进的DRAM, 通过交付支持下一代服务器工作负载 内存性能提升85%以上 数据速率为4800 MT/s. DDR5 will continue on to enable greater than double the data rates and effective bandwidth when compared to DDR4, fueling the increasing CPU core counts needed to enable year-over-year compute gains.

新的存储技术带来了机遇和担忧

A major transition in 内存 technology can trigger many questions and challenges for adopters and developers as new features and functionality are introduced. 热会如何比较呢? 设计人员如何获得用于仿真的功能模型? 需要考虑的关键技术差异是什么? 因为DDR5和DDR4是完全不同的动物, architects and designers are finding they must think differently about DDR5 adoption, 或者提出.

下面是一些例子:

  • For improved efficiency and stability DDR5 modules introduce local voltage regulation with a power management integrated circuit (PMIC), 历史上在主板上做过什么.
  • DDR5 modules introduce two 40-bit independent channels per DIMM enabled by burst length 16, while DDR4 used just one 72-bit channel per DIMM and burst length 8.
  • DDR5 modules introduce a registered clock driver (RCD) that provides separate clock and address resources to each independent channel on the DIMM.
  • DDR5 introduces decision feedback equalization (DFE) to mitigate the effects of inter-symbol interference (ISI) at higher data rates.
  • DDR5 includes improved refresh schemes (Same Bank Refresh) to help further increase performance by targeting one bank per bank group.
Zoom呼叫图像 Watch the podcast “Why 微米 DDR5 DRAM Is More Than a Leap in Raw Bandwidth” with Rebecca Lewington and myself

美光独特的DDR5合作生态系统发展迅速

美光是第一批这样做的公司之一 为数据中心客户提供DDR5示例但我们看到了更深层次的需求. “作为DDR5规范的主要开发者, 美光在DDR5标准开发的早期就看到了机会,美光首席执行官说, 桑杰Mehrotra. “This is why we launched the DDR5 Technology Enablement Program (or TEP) to help get the entire ecosystem ready for DDR5 platform integration and optimization.”

的 微米DDR5 TEP该公司一年前宣布 少数生态系统合作伙伴 包括Cadence, 蒙太奇, Rambus, 瑞萨和新思科技, 这是业内第一个也是唯一一个吗. 它现在已经发展到来自100多家公司的250多名成员. 在生态系统和知识产权实现等领域的许多领导者, 系统集成, 系统架构, and CPU and ASIC design have joined and are working to ensure a smooth transition to DDR5.

We’re proud of the way the ecosystem is actively 支持ing 微米’s DDR5 TEP “one-stop-shop” where all the key technical content is at the fingertips of developers and adopters. 美光正在提供技术信息的早期访问, 支持, 还有电和热模型. 不仅如此, but 微米 has also seeded DDR5 sample products through this program to aid in industry design, 发展, 以及计算平台的发展.

的 DDR5 TEP encourages discovery and 发展 of next-generation products

Hyperscalers, 大型服务器公司, PC oem厂商已经开始集成DDR5, so it’s expected that workloads using DDR4 now will migrate to DDR5. 但这些新系统不是一夜之间出现的. DDR5 内存 holds great promise; that’s why 微米 created the TEP — to enable partners to draw on ecosystem collaboration to streamline design and integration challenges.

我还感兴趣的是如何, 随着DDR5技术的成熟和TEP成员的扩大, the needs of the TEP are shifting and we’re making new information available. 在这个过渡到DDR5内存, members of the TEP may well find their own interests and 内存 need to evolve as well.

Tep资源，ddr5 TEP Resources page, bringing the performance of DDR5 to the ecosystem

TEP是DDR5设计和文档的一站式商店

微米 is deeply committed to the success of this important jump in system 内存. We’ve made it easy and accessible to find materials to integrate DDR5 into partners’ systems and platforms. 一旦该计划的会员资格获得批准，会员将获得:

  • 技术资源，如数据表, 热, and functional simulation models to aid in product 发展 and platform bring-up
  • 选择可用的DDR5组件和模块示例
  • Connection with other ecosystem partners that can aid in the design and bring up of DDR5 enabled platforms
  • 技术支持和培训材料

鉴于DDR5 DRAM标准的热情接受, the realization of how major and potentially disruptive this high-performance new 内存 will be, 以及美光DDR5 TEP生态系统的惊人增长, 我预测未来会有大事发生. 在即将到来的革命中占据自己的位置!

Bringing DDR5-based products to market or evaluating a DDR5-enabled platform? 加入我们 申请微米DDR5 TEP成员资格.

云业务发展高级经理

布莱恩·德雷克

Brian leverages 17 years of DRAM expertise to lead strategy 发展 in the Data Center segment with a focus on 启用 DDR5 solutions for hyperscale customers. Before moving to his current role within 微米 Brian spent 6 years in Product Engineering where his time was split between leading and/or contributing to teams responsible for developing, 启用, 维护DRAM沙巴体育结算平台. 加入美光公司4年前, he held roles within Infineon and Qimonda as a DRAM test program engineer.